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Update list of EVRs

Merged Update list of EVRs
gabrielfedel/alarm-server-config:update_evrs into master
Merged Gabriel Fedel requested to merge gabrielfedel/alarm-server-config:update_evrs into master
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alarm-01.tn.esss.lu.se/TD.xml
+ 3558
− 78
@@ -6347,302 +6347,3782 @@
<annunciating>false</annunciating>
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<pv name="PBI-ICBLM04:Ctrl-EVR-101:SFP-Pwr-TX-I">
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<pv name="PBI-ICBLM06:Ctrl-EVR-101:Link-Sts">
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<pv name="PBI-ICBLM07:Ctrl-EVR-101:Link-Sts">
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<pv name="PBI-ICBLM07:Ctrl-EVR-101:Pll-Sts">
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<latching>false</latching>
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</component>
<component name="PBI-ICBLM08:Ctrl-EVR-101">
<pv name="PBI-ICBLM08:Ctrl-EVR-101:Link-Sts">
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<latching>false</latching>
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<pv name="PBI-ICBLM08:Ctrl-EVR-101:Time-Valid-Sts">
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<pv name="PBI-ICBLM08:Ctrl-EVR-101:DC-Lck-Sts">
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<annunciating>false</annunciating>
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<latching>false</latching>
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</component>
<component name="PBI-ICBLM09:Ctrl-EVR-101">
<pv name="PBI-ICBLM09:Ctrl-EVR-101:Link-Sts">
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<pv name="PBI-ICBLM09:Ctrl-EVR-101:Time-Valid-Sts">
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<pv name="PBI-ICBLM09:Ctrl-EVR-101:SFP-Pwr-TX-I">
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<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-ICBLM09:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
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<component name="PBI-ICBLM10:Ctrl-EVR-101">
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<pv name="PBI-ICBLM10:Ctrl-EVR-101:Pll-Sts">
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<pv name="PBI-ICBLM10:Ctrl-EVR-101:Time-Valid-Sts">
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<pv name="PBI-ICBLM10:Ctrl-EVR-101:SFP-Pwr-TX-I">
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<pv name="PBI-ICBLM10:Ctrl-EVR-101:DC-Lck-Sts">
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<pv name="PBI-ICBLM10:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
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<pv name="PBI-ICBLM11:Ctrl-EVR-101:Link-Sts">
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<pv name="PBI-ICBLM11:Ctrl-EVR-101:Pll-Sts">
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<pv name="PBI-ICBLM11:Ctrl-EVR-101:SFP-Pwr-TX-I">
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<pv name="ISrc-TimCon:Ctrl-EVR-101:DC-Lck-Sts">
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<component name="PBI-FC01:Ctrl-EVR-101">
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<pv name="PBI-IPM01:Ctrl-EVR-101:Link-Sts">
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<pv name="PBI-FC01:Ctrl-EVR-101:Pll-Sts">
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<pv name="PBI-FC01:Ctrl-EVR-101:Time-Valid-Sts">
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<pv name="PBI-FC01:Ctrl-EVR-101:SFP-Pwr-RX-I">
<pv name="PBI-IPM01:Ctrl-EVR-101:SFP-Pwr-RX-I">
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<pv name="PBI-FC01:Ctrl-EVR-101:SFP-Pwr-TX-I">
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<annunciating>false</annunciating>
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<pv name="PBI-FC01:Ctrl-EVR-101:DC-Lck-Sts">
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<annunciating>false</annunciating>
</pv>
<pv name="PBI-FC01:Ctrl-EVR-101:DC-Ena-RB">
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<latching>false</latching>
<annunciating>false</annunciating>
</pv>
</component>
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<component name="PBI-IPM02:Ctrl-EVR-101">
<pv name="PBI-IPM02:Ctrl-EVR-101:Link-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="FBIS-DLN02:Ctrl-EVR-01:Pll-Sts">
<pv name="PBI-IPM02:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="FBIS-DLN02:Ctrl-EVR-01:Time-Valid-Sts">
<pv name="PBI-IPM02:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="FBIS-DLN02:Ctrl-EVR-01:SFP-Pwr-RX-I">
<pv name="PBI-IPM02:Ctrl-EVR-101:SFP-Pwr-RX-I">
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<annunciating>false</annunciating>
</pv>
<pv name="FBIS-DLN02:Ctrl-EVR-01:SFP-Pwr-TX-I">
<pv name="PBI-IPM02:Ctrl-EVR-101:SFP-Pwr-TX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="FBIS-DLN02:Ctrl-EVR-01:DC-Lck-Sts">
<pv name="PBI-IPM02:Ctrl-EVR-101:DC-Lck-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="FBIS-DLN02:Ctrl-EVR-01:DC-Ena-RB">
<pv name="PBI-IPM02:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
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<component name="PBI-nBLM01:Ctrl-EVR-101">
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<component name="PBI-IPM03:Ctrl-EVR-101">
<pv name="PBI-IPM03:Ctrl-EVR-101:Link-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM01:Ctrl-EVR-101:Pll-Sts">
<pv name="PBI-IPM03:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-nBLM01:Ctrl-EVR-101:Time-Valid-Sts">
<pv name="PBI-IPM03:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM01:Ctrl-EVR-101:SFP-Pwr-RX-I">
<pv name="PBI-IPM03:Ctrl-EVR-101:SFP-Pwr-RX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM01:Ctrl-EVR-101:SFP-Pwr-TX-I">
<pv name="PBI-IPM03:Ctrl-EVR-101:SFP-Pwr-TX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM01:Ctrl-EVR-101:DC-Lck-Sts">
<pv name="PBI-IPM03:Ctrl-EVR-101:DC-Lck-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM01:Ctrl-EVR-101:DC-Ena-RB">
<pv name="PBI-IPM03:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
</component>
<component name="PBI-nBLM02:Ctrl-EVR-101">
<pv name="PBI-nBLM02:Ctrl-EVR-101:Link-Sts">
<component name="PBI-nBLM03:Ctrl-EVR-101">
<pv name="PBI-nBLM03:Ctrl-EVR-101:Link-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM02:Ctrl-EVR-101:Pll-Sts">
<pv name="PBI-nBLM03:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM02:Ctrl-EVR-101:Time-Valid-Sts">
<pv name="PBI-nBLM03:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM02:Ctrl-EVR-101:SFP-Pwr-RX-I">
<pv name="PBI-nBLM03:Ctrl-EVR-101:SFP-Pwr-RX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM02:Ctrl-EVR-101:SFP-Pwr-TX-I">
<pv name="PBI-nBLM03:Ctrl-EVR-101:SFP-Pwr-TX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM02:Ctrl-EVR-101:DC-Lck-Sts">
<pv name="PBI-nBLM03:Ctrl-EVR-101:DC-Lck-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM02:Ctrl-EVR-101:DC-Ena-RB">
<pv name="PBI-nBLM03:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
</component>
<component name="PBI-DPL01:Ctrl-EVR-101">
<pv name="PBI-DPL01:Ctrl-EVR-101:Link-Sts">
<component name="PBI-nBLM04:Ctrl-EVR-101">
<pv name="PBI-nBLM04:Ctrl-EVR-101:Link-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-DPL01:Ctrl-EVR-101:Pll-Sts">
<pv name="PBI-nBLM04:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-DPL01:Ctrl-EVR-101:Time-Valid-Sts">
<pv name="PBI-nBLM04:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-DPL01:Ctrl-EVR-101:SFP-Pwr-RX-I">
<pv name="PBI-nBLM04:Ctrl-EVR-101:SFP-Pwr-RX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-DPL01:Ctrl-EVR-101:SFP-Pwr-TX-I">
<pv name="PBI-nBLM04:Ctrl-EVR-101:SFP-Pwr-TX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-DPL01:Ctrl-EVR-101:DC-Lck-Sts">
<pv name="PBI-nBLM04:Ctrl-EVR-101:DC-Lck-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-DPL01:Ctrl-EVR-101:DC-Ena-RB">
<pv name="PBI-nBLM04:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
</component>
<component name="PBI-nBLM05:Ctrl-EVR-101">
<pv name="PBI-nBLM05:Ctrl-EVR-101:Link-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM05:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM05:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM05:Ctrl-EVR-101:SFP-Pwr-RX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM05:Ctrl-EVR-101:SFP-Pwr-TX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM05:Ctrl-EVR-101:DC-Lck-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM05:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
</component>
<component name="PBI-nBLM06:Ctrl-EVR-101">
<pv name="PBI-nBLM06:Ctrl-EVR-101:Link-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM06:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-nBLM06:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-nBLM06:Ctrl-EVR-101:SFP-Pwr-RX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM06:Ctrl-EVR-101:SFP-Pwr-TX-I">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM06:Ctrl-EVR-101:DC-Lck-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM06:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
</component>
<component name="PBI-nBLM07:Ctrl-EVR-101">
<pv name="PBI-nBLM07:Ctrl-EVR-101:Link-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM07:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-nBLM07:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<latching>false</latching>
<annunciating>false</annunciating>
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<latching>false</latching>
<annunciating>false</annunciating>
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<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM07:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
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<component name="PBI-nBLM08:Ctrl-EVR-101">
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<latching>false</latching>
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<pv name="PBI-nBLM08:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-nBLM08:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<latching>false</latching>
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<latching>false</latching>
<annunciating>false</annunciating>
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<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-nBLM08:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
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<component name="PBI-nBLM09:Ctrl-EVR-101">
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<pv name="PBI-nBLM09:Ctrl-EVR-101:Pll-Sts">
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<pv name="PBI-nBLM09:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<annunciating>false</annunciating>
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<latching>false</latching>
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<annunciating>false</annunciating>
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<latching>false</latching>
<annunciating>false</annunciating>
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<component name="PBI-nBLM10:Ctrl-EVR-101">
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<pv name="PBI-nBLM10:Ctrl-EVR-101:Pll-Sts">
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<latching>false</latching>
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<pv name="PBI-nBLM10:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
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<component name="PBI-WS01:Ctrl-EVR-101">
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<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-WS01:Ctrl-EVR-101:Pll-Sts">
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<annunciating>false</annunciating>
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<pv name="PBI-WS01:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
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<pv name="PBI-WS01:Ctrl-EVR-101:SFP-Pwr-TX-I">
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<annunciating>false</annunciating>
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<pv name="PBI-WS01:Ctrl-EVR-101:DC-Lck-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
<pv name="PBI-WS01:Ctrl-EVR-101:DC-Ena-RB">
<latching>false</latching>
<annunciating>false</annunciating>
</pv>
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<component name="PBI-WS06:Ctrl-EVR-101">
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<latching>false</latching>
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<pv name="PBI-WS06:Ctrl-EVR-101:Pll-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-WS06:Ctrl-EVR-101:Time-Valid-Sts">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-WS06:Ctrl-EVR-101:SFP-Pwr-RX-I">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-WS06:Ctrl-EVR-101:SFP-Pwr-TX-I">
<latching>false</latching>
<annunciating>false</annunciating>
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<pv name="PBI-WS06:Ctrl-EVR-101:DC-Lck-Sts">
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<annunciating>false</annunciating>
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<pv name="PBI-WS06:Ctrl-EVR-101:DC-Ena-RB">
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<annunciating>false</annunciating>
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