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v4.7.0
Adds functionality for DC offset adjustment of DWCVM1 RTM
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v4.6.1
Removes sis8300drv_rem from command line tools.
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v4.4.1
Added tag v4.4.1 for changeset e76808e3f297
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v4.4.0
Adds functionality to set RTM ADC attenuator values via FPGA registers.
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v4.3.4
Limit maximum register access to 0xFFF.
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v4.3.3
Extend permitted register access range to 0x1000.
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v4.3.2
Adds restriction on maximum register address that can be accessed by driver.
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v4.3.1
Correct reading of AI channel data from device.
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v4.3.0
Import alignment of 256 samples for each AI channel memory allocation."
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v4.2.0
Added function to roundup to multiples of 32
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v4.1
Increased memory block length to 512 bints (32 samples of 16 bits each).
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v4.0
Merged Hinko's branch and increased length of memory block to 32 samples of 16bits each.